Digitally Controlled Oscillator for mm-Wave Frequencies

In the fifth generation of mobile communication, 5G, frequencies above 30 GHz, so-called millimeter-wave (mm-wave) frequencies are expected to play a prominent role. For the synthesis of these frequencies, the all-digital phase locked loop (ADPLL) has recently gained much attention. A core component of the ADPLL is the digitally controlled oscillator (DCO), an oscillator that tunes the frequency discretely. For good performance, the frequency steps must be made very small, while the total tuning range must be large. This thesis covers several coarse- and fine-tuning techniques for DCOs operating at mm-wave frequencies. Three previously not published fine-tuning schemes are presented: The first one tunes the second harmonic, which will, due to the Groszkowski effect, tune the fundamental tone. The second one is a current-modulation scheme, which utilizes the weak current-dependence of the capacitance of a transistor to tune the frequency. In the third one, a digital-to-analog converter (DAC) is connected to the bulk of the differential pair and tunes the frequency by setting the bulk voltage. The advantages and disadvantages of the presented tuning schemes are discussed and compared with previously reported fine-tuning schemes. Two oscillators were implemented at 86 GHz. Both oscillator use the same oscillator core and hence have the same power consumption and tuning range, 14.1 mW and 13.9%. A phase noise of -89.7 dBc/Hz and -111.4 dBc/Hz at 1 MHz and 10 MHz offset, respectively, were achieved, corresponding to a Figure-of-Merit of -178.5 dBc/Hz. The first oscillator is fine-tuned using a combination of a transformer-based fine-tuning and the current modulation scheme presented here. The achieved frequency resolution is 55 kHz, but can easily be made finer. The second oscillator utilizes the bulk bias technique to achieve its fine tuning. The fine-tuning resolution is here dependent on the resolution of the DAC; a 100μV resolution corresponds to a resolution of 50 kHz.n 2011, the global monthly mobile data usage was 0.5 exabytes, or 500 million gigabytes. In 2016, this number had increased to 7 exabytes, an increase by a factor 14 in just five years, and there are no signs of this trend slowing down. To meet the demands of the ever increasing data usage, engineers have begun to investigate the possibility to use significantly higher frequencies, 30 GHz or higher, for mobile communication than what is used today, which is 3 GHz or below. To be able to transmit and receive data at these high frequency, an oscillator capable of operating at these frequencies are required. An oscillator is an electrical circuit that generates an alternating current (a current that first goes one way, and then the other) at a specific frequency. Below is an example to illustrate to function and importance of the oscillator: Imagine driving a car and listening to the radio. Suddenly, a horrendous song starts playing from the radio, so you instantly tune to another station and find some great, smooth jazz. Satisfied, you lean back and drive on. But what exactly happened when you "tuned to another station"? What you really did was changing the frequency of the oscillator, which can be found in the radio receiver of the car. The radio receiver filters out all frequencies, except for the frequency of the local oscillator. So by setting the frequency of the local oscillator to the frequency of the desired radio channel, only this radio channel will reach the speakers of the car. Thus, the oscillator must be able to vary its frequency to any frequency that a radio station can transmit on. While an old car radio may seem like a simple example, the very same principle is used in mobile communication, even at frequencies above 30 GHz. The oscillator is also used in the same way when transmitting signals, so that the signals are transmitted on the correct frequency. The design of the local oscillator is a hot topic among radio engineers. A poorly designed oscillator will ruin the performance of the whole receiver or transmitter. This thesis covers the design of a special type of oscillators, called digital controlled oscillators or DCO, operating at 30 GHz or higher. The frequency of these oscillators are determined by a digital word (ones and zeros), instead of using an analog voltage, which is traditionally used. Digital control results in greater flexibility and higher noise-resilience, but it also means that the frequency can’t be changed continuously, but rather in discrete steps. This discrete behavior will cause noise in the receiver. To minimize this noise, the frequency steps should be minimized. In this thesis, we have proposed a DCO design, operating at 85.5 GHz, which can be tuned almost 7 % in either direction. To our knowledge, no other DCO operates at such high frequencies. In the proposed oscillators the frequency steps are only 55 kHz apart, which is so small that its effect on the radio receiver can, with a good conscience, be ignored. This is achieved with a novel technique that makes tiny, tiny changes in the current that passes through the oscillator

An LO Frequency Tripler with Phase Shifter and Detector in 28nm FD-SOI CMOS for 28-GHz Transceivers

This paper presents an LO frequency multiplier and phase shifter for the 28-GHz band, implemented in 28nm FD-SOI CMOS technology. The phase control is introduced in an injection-locked oscillator, followed by an injection-locked frequency tripler. The phase of the output signal is compared with that of the input signal using a phase detector based on third harmonic mixing, enabling automatic phase tuning using low frequency detector outputs. Additionally, the phase detector can be used to detect locking of the oscillators, supporting automatic frequency tuning. A 24-30GHz sliding-IF receiver is also implemented to test the LO circuitry. Simulations show that the phase shifter achieves >360° tuning range over the full 24-30GHz span, with a gain variation of 0.11 dB or less, and that the phase detector has an rms phase error of <2.5°. The entire chip, including pads, measures 1080μm x 1080μm and consumes 27-29 mW from a 1 V supply

An LO phase shifter with frequency tripling and phase detection in 28 nm FD-SOI CMOS for mm-wave 5G transceivers

This paper presents an LO phase shifter with frequency tripling for 28-GHz 5G transceivers. The phase shifting and frequency tripling are achieved using an injection-locked oscillator and injection-locked frequency tripler, respectively. A phase detector based on third harmonic mixing is also implemented and is used to detect the applied phase shift, supporting automatic calibration of the phase shifter. Additionally, an algorithm to automatically tune the oscillators to their respective locking frequency is presented. To test the phase shifter, a 24–30-GHz sliding-IF receiver is implemented. Simulations show that a > 360∘ tuning range over the full 24–30 GHz span is achieved, with a gain variation of 0.11 dB or less, and that the phase detector has an rms phase error of < 2.5∘. The circuit is implemented in a 28nm FD-SOI CMOS process and the entire chip measures 1080 μ m × 1080 μ m , including pads, and consumes 27–29 mW from a 1 V supply